The SLIMFIT Project at a Glance
With an estimated number of connected devices exceeding 125 billion by 2030, the data volume exchanged by electronic systems is rapidly growing. From this standpoint, edge computing ensures relaxing data transfer and power constraints with benefits for Internet of Things (IoT), smart cities, Artificial Intelligence (AI), and 5G industry. However, its implementation still requires ultra-low power hardware solutions, mainly hindered by the von Neumann bottleneck (VNB), i.e., the slow and energy-hungry continuous data transfer between the CPU and the non-volatile memory (NVM). To circumvent the VNB, significant efforts are currently directed toward the development of neuroprocessors based on emerging NVM (eNVM) devices, with the goal of realizing ultra-low power brain-like AI units for smart edge computing. Unfortunately, such solutions are still at a very embryonic stage and will not be able to enter the market in the short term, leaving a gap behind. On the opposite, given the current performance of eNVMs, ultra-low power Logic-in-Memory (LIM) architectures executing Boolean operations directly inside the memory could already be deployed at the edge, filling the gap and propelling the pervasive AI revolution. LIM processing would also enable the energy-efficient execution of powerful computing paradigms such as Deep/Binarized Neural Networks (DNNs/BNNs) on portable devices. This opens the route for tremendous market opportunities in a wide range of applications, e.g., wireless sensor networks, autonomous driving, real-time medical diagnosis, security and surveillance, wearables and smart clothing.
In the above scenario, SLIMFIT aims at developing a smart LIM architecture based on eNVMs by the collaboration between two research units from University of Modena and Reggio Emilia (UNIMORE) and University of Calabria (UNICAL). The designed computing platform will meet well-defined ambitious yet attainable targets for portable IoT applications:
1. fast and reliable operation with ultra-low energy consumption through clever device/circuit co-design and evaluated up to the architecture-level using a cross-layer simulation framework
2. full programmability via support of a dedicated instruction set to execute generic logic functions.
Although SLIMFIT will focus on Resistive Random Access Memory (RRAM) and Spin-Transfer Torque Magnetoresistive RAM (STT-MRAM) as the current most promising eNVMs for LIM applications, the architecture will be fully compatible with all two-terminal eNVMs.
An experimental validation of the implemented LIM paradigm will be also performed using a testing platform based on an FPGA driving individual packaged RRAMs. Architecture-level performance will be verified using a standard workload for data cryptography application (i.e., “Blowfish”). The expected results will guarantee a high impact of the project in the short and mid-term, with significant repercussions on both scientific community and industry.